2017

  1. Y. Ben-Hur and Y. Cassuto,
    Detectors and Codes for Sneak-Path Interference in Resistive Arrays
    2017 NVMW – Non-Volatile Memory Workshop, San Diego CA USA.
  2. Z. Wang, H. Kiah, Y. Cassuto and J. Bruck,
    Switch Codes: Codes for Fully Parallel Reconstruction
    IEEE Transactions on Information Theory, 04/2017.
  3. N. Adler and Y. Cassuto,
    Burst-Erasure Correcting Codes with Optimal Average Delay
    IEEE Transactions on Information Theory, 05/2017. 
  4. T. Mizrahi, Y. Revah, Y. Refael Kalim, E. Kapuza and Y. Cassuto
    FM-Delta: Fault Management Packet Compression
    IEEE International Symposium on Integrated Network Management (IM 2017). project site with trace files.
  5. O. Rottenstreich and Y. Cassuto,
    Optimal Compression for Two-Field Entries in Fixed-Width Memories
    IEEE Transactions on Information Theory, 12/2016 submitted. 
  6. Y. Ben-Hur and Y. Cassuto
    Detection and Coding Schemes for Parallel Interference in Resistive Memories
    IEEE International Conference on Communications, Data Storage Track (ICC 2017). 
  7. R. Cohen and Y. Cassuto,
    Coding for Improved Throughput Performance in Network Switches
    IEEE/ACM Transactions on Networking, to appear.
  8. R. Cohen and Y. Cassuto,
    Finite-Length LDPC Codes on the q -ary Multi-Bit Channel
    IEEE International Symposium on Information Theory, ISIT 2017.
  9. Y. Cassuto, E. Hemo, S. Puchinger and M. Bossert
    Multi-Block Interleaved Codes for Local and Global Read Access
    IEEE International Symposium on Information Theory, ISIT 2017.
  10. S. Buzaglo, Y. Cassuto, P.H. Siegel and E. Yaakobi
    Consecutive Switch Codes
    IEEE Transactions on Information Theory, to appear.
  11. E. Hemo and Y. Cassuto,
    A Constraint Scheme for Correcting Asymmetric Magnitude-1 Errors in q-ary Channels
    IEEE Transactions on Information Theory, accepted.
  12. K. Mizrachi, I. Bloom and Y. Cassuto,
    Memory Reliability for Cells with Strong Bit-Coupling Interference
    ACM International Symposium on Memory Systems, MEMSYS 2017, accepted.

2016

  1. E. Hemo and Y. Cassuto,
    d-imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs
    2016 NVMW – Non-Volatile Memory Workshop, San Diego CA USA.
  2. R. Cohen and Y. Cassuto,
    Iterative Decoding of LDPC Codes Over the q-Ary Partial Erasure Channel
    IEEE Transactions on Information Theory, 05/2016
  3. Y. Cassuto, S. Kvatinsky and E. Yaakobi,
    Write Sneak-Path Constraints Avoiding Disturbs in Memristor Crossbar Arrays
    IEEE International Symposium on Information Theory, ISIT 2016.
  4. E. Hemo and Y. Cassuto,
    d-imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs
    IEEE International Symposium on Information Theory, ISIT 2016.
  5. R. Cohen and Y. Cassuto,
    Placement and Read Algorithms for High Throughput in Coded Network Switches
    IEEE International Symposium on Information Theory, ISIT 2016.
  6. S. Buzaglo, E. Yaakobi, Y. Cassuto and P.H. Siegel,
    Consecutive Switch Codes
    IEEE International Symposium on Information Theory, ISIT 2016.
  7. A. Spiegelman, Y. Cassuto, G. Chockler and I. Keidar,
    Space Bounds for Reliable Storage: Fundamental Limits of Coding, Keynote by I. Keidar at Int'l Conf. on Principles of Distributed Computing (OPODIS), Rennes, France, 12/2015.
  8. A. Spiegelman, Y. Cassuto, G. Chockler and I. Keidar,
    Space Bounds for Reliable Storage: Fundamental Limits of Coding,
    ACM Symposium on Principles of Distributed Computing, PODC 2016.
  9. M. Hashemi, Y. Cassuto and A. Trachtenberg,
    Fountain Codes with Nonuniform Selection Distributions through Feedback
    IEEE Transactions on Information Theory, 07/2016. 
  10. Y. Cassuto, S. Kvatinsky and E. Yaakobi,
    Information-Theoretic Sneak-Path Mitigation in Memristor Crossbar Arrays
    IEEE Transactions on Information Theory, 09/2016. 
  11. E. Hemo and Y. Cassuto,
    d-imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs
    IEEE JSAC special issue on Channel Modeling, Coding and Signal Processing for Novel Physical Memory Devices and Systems, 09/2016.
  12. R. Cohen and Y. Cassuto, 
    LDPC Codes for the q-ary Measurement Channel
    IEEE International Symposium on Turbo Codes and Iterative Information Processing, ISTC 2016. 
  13. A. Solomon and Y. Cassuto, 
    Adaptive Threshold Read Algorithms in Multi-level Non-Volatile Memories with Uncertainty
    IEEE ICSEE 2016, Eilat Israel.

2015

  1. E. Hemo and Y. Cassuto,
    A Constraint Scheme for Correcting Massive Asymmetric Magnitude-1 Errors in Multi-Level NVMs
    2015 NVMW – Non-Volatile Memory Workshop, San Diego CA USA.
  2. Y. Cassuto and A. Shokrollahi,
    On-Line Fountain Codes with Low Overhead
    IEEE Transactions on Information Theory, 06/2015. 
  3. E. Hemo and Y. Cassuto,
    Performance Coding: Codes for Fast Write and Read in Multi-Level NVMs
    IEEE Transactions on Communications, 03/2015.
  4. E. Zohar and Y. Cassuto,
    Data Compression Cost Optimization
    IEEE Data Compression Conference (DCC 2015).
  5. G. Grebla, E. Arkin, J. Mitchell, M. Segal, A. Efrat, Y. Cassuto and S. Sankararaman,
    Optimal Placement of Protective Jammers for Securing Wireless Transmissions in a Geographic Domain
    ACM/IEEE Conference on Information Processing in Sensor Networks (IPSN 2015).
  6. R. Cohen and Y. Cassuto,
    Design of LDPC Codes for the q-ary Partial Erasure Channel
    IEEE Information Theory Workshop, ITW 2015 Jerusalem.
  7. Y. Allouche, Y. Cassuto, A. Efrat,  M. Segal, E. Arkin, G. Grebla, J. Mitchell and S. Sankararaman,
    Secure Communication through Jammers Jointly Optimized in Geography and Time
    ACM MobiHoc 2015.
  8. N. Adler and Y. Cassuto,
    Low-Delay Erasure-Correcting Codes with Optimal Average Delay
    IEEE International Symposium on Information Theory, ISIT 2015.
  9. R. Cohen and Y. Cassuto,
    Algorithms and Throughput Analysis for MDS-Coded Switches
    IEEE International Symposium on Information Theory, ISIT 2015.
  10. E. Hemo and Y. Cassuto,
    A Constraint Scheme for Correcting Massive Asymmetric Magnitude-1 Errors in Multi-Level NVMs
    IEEE International Symposium on Information Theory, ISIT 2015.
  11. Z. Wang, H. Kiah and Y. Cassuto,
    Optimal Binary Switch Codes with Small Query Size
    IEEE International Symposium on Information Theory, ISIT 2015.
  12. Y. Cassuto and K. Crammer,
    In-Memory Hamming Similarity Computation in Resistive Arrays
    IEEE International Symposium on Information Theory, ISIT 2015, in semi-plenary session.

2014

  1. Y. Levi, J. Bruck, Y. Cassuto, E. Friedman, A. Kolodny, E. Yaakobi and S. Kvatinsky
    Logic Operations in Memory Using a Memristive Akers Array
    Microelectronics Journal, 8/2014.
  2. E. Zohar and Y. Cassuto,
    Automatic and Dynamic Configuration of Data Compression for Web Servers
    USENIX Large Installation System Administration Conference (LISA 2014).
  3. R. Cohen and Y. Cassuto,
    Estimation of the Decoding Threshold of LDPC Codes over the q-ary Partial Erasure Channel
    IEEE International Symposium on Turbo Codes and Iterative Information Processing, ISTC 2014.
  4. Y. Cassuto and E. Yaakobi,
    Short Q-ary Fixed-Rate WOM Codes for Guaranteed Re-writes and with Hot/Cold Write Differentiation
    IEEE Transactions on Information Theory, 07/2014.
  5. Y. Cassuto, S. Kvatinsky and E. Yaakobi,
    On the Channel Induced by Sneak-Path Errors in Memristor Arrays
    2014 IEEE SPCOM – Indian Institute of Science Bangalore, invited paper.
  6. S. Odeh and Y. Cassuto,
    NAND Flash Architectures Reducing Write Amplification Through Multi-Write Codes
    IEEE International Conference on Massive Storage Systems and Technology, MSST 2014.
  7. E. Hemo and Y. Cassuto,
    Codes for High Performance Write and Read Processes in Multi-Level NVMs
    IEEE International Symposium on Information Theory, ISIT 2014.
  8. R. Cohen and Y. Cassuto,
    LDPC Codes for Partial-Erasure Channels in Multi-Level Memories
    IEEE International Symposium on Information Theory, ISIT 2014.
  9. Y. Cassuto and A. Shokrollahi,
    LDPC Codes for Two-Dimensional Arrays
    IEEE Transactions on Information Theory, 06/2014.
  10. E. Hemo and Y. Cassuto,
    Adaptive Threshold Read Algorithms in Multi-level Non-Volatile Memories,
    IEEE JSAC special issue on Communication Methodologies for the Next-Generation Storage Systems, 05/2014.
  11. E. Hemo and Y. Cassuto,
    Codes for Fast Writes in Multi-Level NVMs
    2014 NVMW – Non-Volatile Memory Workshop, San Diego CA USA.
  12. S. Odeh and Y. Cassuto,
    Write-Amplification Reduction Through Multi-Write Codes in Flash Storage
    2014 NVMW – Non-Volatile Memory Workshop, San Diego CA USA.
  13. O. Rottenstreich, M. Radan, Y. Cassuto, I. Keslassy, C. Arad, T. Mizrahi, Y. Revah, and A. Hassidim,
    Compressing Forwarding Tables for Datacenter Scalability,
    IEEE JSAC special issue on Switching and Routing for Scalable and Energy-efficient Datacenter Networks, 01/2014.

2013

  1. Y. Cassuto, S. Kvatinsky and E. Yaakobi,
    Sneak-Path Constraints in Memristor Crossbar Arrays
    IEEE International Symposium on Information Theory, ISIT 2013.
  2. E. Hemo and Y. Cassuto, 
    Adaptive Threshold Read Algorithms in Multi-level Non-Volatile Memories
    IEEE International Symposium on Information Theory, ISIT 2013.
  3. Z. Wang, O. Shaked, Y. Cassuto and J. Bruck,
    Codes for Network Switches
    IEEE International Symposium on Information Theory, ISIT 2013.
  4. Y. Cassuto, S. Kvatinsky and E. Yaakobi,
    Sneak-Path Constraints in Memristor Crossbar Arrays
    2013 NVMW – Non-Volatile Memory Workshop, San Diego CA USA.
  5. Y. Cassuto,
    What Can Coding Theory Do for Storage Systems?
    ACM SIGACT News, Distributed Computing Column 49 (Ed. Idit Keidar), March 2013.
  6. Y. Cassuto, J. Bruck and R.J McEliece,
    On the Average Complexity of Reed-Solomon List Decoders
    IEEE Transactions on Information Theory, 04/2013.
  7. M. Hashemi, A. Trachtenberg and Y. Cassuto,
    Delete-And-Conquer: Rateless Coding with Constrained Feedback
    2013 Allerton Conference on Communication, Control, and Computing.
  8. O. Rottenstreich, A. Berman, Y. Cassuto and I. Keslassy
    Compression for Fixed-Width Memories
    IEEE International Symposium on Information Theory, ISIT 2013.
  9. O. Rottenstreich, M. Radan, Y. Cassuto, I. Keslassy, C. Arad, T. Mizrahi, Y. Revah, and A. Hassidim,
    Compressing Forwarding Tables (longer TR version)
    IEEE INFOCOM 2013.

2012

  1. Y. Cassuto and E. Yaakobi,
    Short Q-ary WOM Codes with Hot/Cold Write Differentiation
    Proc. of the 2012 IEEE International Symposium on Information Theory, ISIT2012, Boston MA, USA, July 2012.
  2. Y. Cassuto and E. Yaakobi,
    Practical Re-Write Codes with Access Considerations
    2012 NVMW – Non-Volatile Memory Workshop, San Diego CA USA.
  3. Y. Cassuto and J. Bruck,
    Low-Complexity Array Codes for Random and Clustered 4-Erasures
    IEEE Transactions on Information Theory, 01/2012.

2011

  1. Y. Cassuto and M. Blaum,
    Codes for Symbol-Pair Read Channels
    IEEE Transactions on Information Theory, 12/2011.
  2.  Y. Cassuto and A. Shokrollahi,
    Array-Code Ensembles -or- Two-Dimensional LDPC Codes
    Proc. of the 2011 IEEE International Symposium on Information Theory, St. Petersburg, Russia, August 2011.
  3. Y. Cassuto and S. Litsyn,
    Symbol-Pair Codes: Algebraic Constructions and Asymptotic Bounds
    Proc. of the 2011 IEEE International Symposium on Information Theory, St. Petersburg, Russia, August 2011.
  4. Y. Cassuto and A. Shokrollahi,
    On-Line Fountain Codes for Semi-Random Loss Channels
    Proc. of the 2011 IEEE Information Theory Workshop, ITW2011, Paraty Brazil, October 2011.

2010

  1. Y. Cassuto,
    Not just for errors: codes for fast and secure flash storage
    Globecom 2010, Workshop on the Application of Communication Theory to Emerging Memory Technologies (ACTEMT) 12/2010.
  2. Y. Cassuto and Z. Bandic,
    Low-Complexity Wire-Tap Codes with Security and Error-Correction Guarantees
    Proc. of the 2010 IEEE Information Theory Workshop, ITW2010, Dublin, Ireland, September 2010.
  3. Y. Cassuto and M. Blaum,
    Codes for Symbol-Pair Read Channels
    Proc. of the 2010 IEEE International Symposium on Information Theory, ISIT2010, Austin TX, USA, June 2010.
  4. Y. Cassuto, M. Sanvido, C. Guyot, D. Hall and Z. Bandic,
    Indirection Systems for Shingled-Recording Disk Drives
    Proc. of the The 26th IEEE Symposium on Massive Storage Systems and Technologies, MSST 2010, Lake Tahoe NV, USA, May 2010.
  5. Y. Cassuto, M. Schwartz, V. Bohossian and J. Bruck,
    Codes for Asymmetric Limited-Magnitude Errors with Application to Multi-Level Flash Memories
    IEEE Transactions on Information Theory, 04/2010  * IEEE ComSoc 2010 Best Student Paper Award in Data Storage *

Earlier

  1. M. Sanvido, Y. Cassuto and C. Guyot,
    Q&A: Encrypting flash and solid state memory devices
    Enterprise Systems Journal, November 11, 2009.
  2. Y. Cassuto and J. Bruck,
    Cyclic Lowest-Density MDS Array Codes
    IEEE Transactions on Information Theory, 04/2009
  3. Y. Cassuto and J. Bruck,
    Array Codes for Clustered Column Erasures
    Proc. of the 2008 IEEE International Symposium on Information Theory, ISIT2008, Toronto, Canada, July 2008.
  4. Y. Cassuto, M. Schwartz, V. Bohossian and J. Bruck,
    Codes for multilevel Flash memories: correcting asymmetric limited-magnitude errors
    Proc. of the 2007 IEEE International Symposium on Information Theory, ISIT2007, Nice, France, June 2007.
  5. Y. Cassuto and J. Bruck,
    Cyclic low density MDS array codes,
    Proc. of the 2006 IEEE International Symposium on Information Theory, ISIT2006, Seattle WA, USA, July 2006.
  6. Y. Cassuto and J. Bruck,
    On the average complexity of Reed-Solomon algebraic list decoders
    Proc. of the 8th International Symposium on Communication Theory and Applications, ISCTA2005, Ambleside, UK, July 2005.
  7. Y. Cassuto and J. Bruck,
    Miscorrection probability beyond the minimum distance
    Proc. of the 2004 IEEE International Symposium on Information Theory, ISIT2004, Chicago IL, USA, July 2004.
  8. S. Jaggi, Y. Cassuto and M. Effros,
    Low complexity encoding for network codes
    Proc. of the 2006 IEEE International Symposium on Information Theory, ISIT2006, Seattle WA, USA, July 2006.
  9. Y. Cassuto and J. Bruck,
    Network coding for non-uniform demands
    Proc. of the 2005 IEEE International Symposium on Information Theory, ISIT2005, Adelaide, Australia, September 2005.
  10. Y. Cassuto and M. Lustig,
    A Mark of distinction
    New Electronics on Campus Magazine, Spring 2002.
  11. Y. Cassuto, M. Lustig and S. Mizrachi,
    Real-time digital watermarking system for audio signals using perceptual masking
    $100,000 award winning paper at the
    Texas Instruments DSP and Analog Challenge, Dallas, TX, USA, August 2001.
  12. Y. Cassuto, M. Lustig, G. Leifman, T. Mizrahi, E. Borenstein, S. Mizrachi and N. Peleg,
    Digital watermarking systems for audio signals: off-line and real-time applications
    Texas Instruments Exhibit, ICASSP 2000, Istanbul, Turkey, June 2000.
  13. T. Mizrahi, E. Borenstein, G. Leifman, Y. Cassuto, M. Lustig, S. Mizrachi, N. Peleg,
    Real-time implementation for digital watermarking in audio signals using perceptual masking
    Proc. of the 3rd European DSP Education and Research Conference, ESIEE, Noisy Le Grand, Paris, France, September 2000.

Patents

  1. 1 USPTO patent issued.
  2. 5 USPTO patent applications

 

 

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